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In early 2000 Intel had suffered a significant setback with the i820 northbridge. 82801AB (ICH0) - Ultra ATA/33 support, 4 PCI slots, no Alert on LAN.82801AA (ICH) - Ultra ATA/66 support, 6 PCI slots, Alert on LAN support.System Management Bus (SMBus) with support for I☬ devices.Integrated I/O APIC supporting 24 interrupt sources.Integrated IDE controller for Ultra ATA support.Advanced Configuration and Power Interface (ACPI) Support.PCI Rev 2.2 compliant with support for 33 MHz PCI operations.Thus, the northbridge became the Memory Controller Hub (MCH) or if it had integrated graphics (e.g., Intel 810), the Graphics and Memory Controller Hub (GMCH). Note that, along with the ICH, Intel evolved other uses of the "Hub" terminology. Another design decision was to substitute the rigid North-South axis on the motherboard with a star structure. The Hub Interface was a point-to-point connection between different components on the motherboard. While its predecessor, the PIIX, was connected to the northbridge through an internal PCI bus with a bandwidth of 133 MB/s, the ICH used a proprietary interface (called by Intel Hub Interface) that linked it to the northbridge through an 8- bit wide, 266 MB/s bus. The first version of the ICH was released in June 1999 along with the Intel 810 northbridge.
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